1. Technical Field
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Related Art
Recently, Metal-Insulator-Metal (hereinafter, MIM) type capacitor elements, having significantly smaller parasitic resistance and parasitic capacitance than conventional MOS type capacitor elements, have come to be popularly used. The MIM type capacitor element can also be incorporated in a logic device thus constituting one single piece of chip. To achieve such structure, the structure and manufacturing process of the both devices have to be integrated. The logic devices generally include interconnects stacked in multiple layers. Accordingly, it is a critical technical issue how to adapt the structure and process of the MIM type capacitor element to the multilayer interconnect structure. From such viewpoint, a process has been developed through which an electrode of the MIM type capacitor element is formed by a similar method to build up the multilayer interconnect structure of the logic device.
The MIM type capacitor element is, in most conventional cases, formed in a region under which no interconnect is provided as described in Japanese Laid-open patent publication No. 2003-258107, and is seldom formed above a region where fine interconnects are densely provided.